Re: [PATCH v4 3/7] ARM64: dts: meson-gx: use stable UART bindings with correct gate clock
From: Jerome Brunet
Date: Mon Jun 12 2017 - 05:40:24 EST
On Fri, 2017-06-09 at 11:49 +0200, Neil Armstrong wrote:
> From: Helmut Klein <hgkr.klein@xxxxxxxxx>
>
> This patch switches to the stable UART bindings but also add the correct
> gate clock to the non-AO UART nodes for GXBB and GXL SoCs.
>
> Signed-off-by: Helmut Klein <hgkr.klein@xxxxxxxxx>
> Signed-off-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
Looks Good
Acked-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
> ---
> Âarch/arm64/boot/dts/amlogic/meson-gx.dtsiÂÂÂ| 12 +++++-------
> Âarch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 25 +++++++++++++++++++++++++
> Âarch/arm64/boot/dts/amlogic/meson-gxl.dtsiÂÂ| 25 +++++++++++++++++++++++++
> Â3 files changed, 55 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> index 436b875..d2b8d52 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> @@ -225,7 +225,7 @@
> Â };
> Â
> Â uart_A: serial@84c0 {
> - compatible = "amlogic,meson-uart";
> + compatible = "amlogic,meson-gx-uart";
> Â reg = <0x0 0x84c0 0x0 0x14>;
> Â interrupts = <GIC_SPI 26
> IRQ_TYPE_EDGE_RISING>;
> Â clocks = <&xtal>;
> @@ -233,7 +233,7 @@
> Â };
> Â
> Â uart_B: serial@84dc {
> - compatible = "amlogic,meson-uart";
> + compatible = "amlogic,meson-gx-uart";
> Â reg = <0x0 0x84dc 0x0 0x14>;
> Â interrupts = <GIC_SPI 75
> IRQ_TYPE_EDGE_RISING>;
> Â clocks = <&xtal>;
> @@ -279,7 +279,7 @@
> Â };
> Â
> Â uart_C: serial@8700 {
> - compatible = "amlogic,meson-uart";
> + compatible = "amlogic,meson-gx-uart";
> Â reg = <0x0 0x8700 0x0 0x14>;
> Â interrupts = <GIC_SPI 93
> IRQ_TYPE_EDGE_RISING>;
> Â clocks = <&xtal>;
> @@ -366,18 +366,16 @@
> Â };
> Â
> Â uart_AO: serial@4c0 {
> - compatible = "amlogic,meson-uart";
> + compatible = "amlogic,meson-gx-uart",
> "amlogic,meson-ao-uart";
> Â reg = <0x0 0x004c0 0x0 0x14>;
> Â interrupts = <GIC_SPI 193
> IRQ_TYPE_EDGE_RISING>;
> - clocks = <&xtal>;
> Â status = "disabled";
> Â };
> Â
> Â uart_AO_B: serial@4e0 {
> - compatible = "amlogic,meson-uart";
> + compatible = "amlogic,meson-gx-uart",
> "amlogic,meson-ao-uart";
> Â reg = <0x0 0x004e0 0x0 0x14>;
> Â interrupts = <GIC_SPI 197
> IRQ_TYPE_EDGE_RISING>;
> - clocks = <&xtal>;
> Â status = "disabled";
> Â };
> Â
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> index dbd300f..1ae8da7 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> @@ -675,6 +675,31 @@
> Â clocks = <&clkc CLKID_SPI>;
> Â};
> Â
> +&uart_A {
> + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> +};
> +
> +&uart_AO {
> + clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> +};
> +
> +&uart_AO_B {
> + clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> +};
> +
> +&uart_B {
> + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
> + clock-names = "xtal", "core", "baud";
> +};
> +
> +&uart_C {
> + clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
> + clock-names = "xtal", "core", "baud";
> +};
> +
> Â&vpu {
> Â compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
> Â};
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
> b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
> index 4dfc22b..0c601f8 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
> @@ -616,6 +616,31 @@
> Â clocks = <&clkc CLKID_SPI>;
> Â};
> Â
> +&uart_A {
> + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
> + clock-names = "xtal", "core", "baud";
> +};
> +
> +&uart_AO {
> + clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> +};
> +
> +&uart_AO_B {
> + clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> +};
> +
> +&uart_B {
> + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
> + clock-names = "xtal", "core", "baud";
> +};
> +
> +&uart_C {
> + clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
> + clock-names = "xtal", "core", "baud";
> +};
> +
> Â&vpu {
> Â compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
> Â};