[PATCH 09/14] clk: tegra: don't warn for pll_d2 defaults unnecessarily

From: Peter De Schrijver
Date: Tue Jul 25 2017 - 06:37:20 EST


If the PLL is on, only warn if the defaults are not yet set. Otherwise be
silent.

Signed-off-by: Peter De Schrijver <pdeschrijver@xxxxxxxxxx>
Reviewed-by: Timo Alho <talho@xxxxxxxxxx>
---
drivers/clk/tegra/clk-tegra210.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index a4d7d94..1e470ca 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -718,8 +718,6 @@ static void plldss_defaults(const char *pll_name, struct tegra_clk_pll *plldss,
plldss->params->defaults_set = true;

if (val & PLL_ENABLE) {
- pr_warn("%s already enabled. Postponing set full defaults\n",
- pll_name);

/*
* PLL is ON: check if defaults already set, then set those
@@ -758,6 +756,10 @@ static void plldss_defaults(const char *pll_name, struct tegra_clk_pll *plldss,
(~PLLDSS_MISC1_CFG_EN_SDM));
}

+ if (!plldss->params->defaults_set)
+ pr_warn("%s already enabled. Postponing set full defaults\n",
+ pll_name);
+
/* Enable lock detect */
if (val & PLLDSS_BASE_LOCK_OVERRIDE) {
val &= ~PLLDSS_BASE_LOCK_OVERRIDE;
--
1.9.1