On Tue, Aug 1, 2017 at 4:54 PM, Icenowy Zheng <icenowy@xxxxxxx> wrote:
The V3s pin controller doesn't have the bank 0 (starts at address
0x200), which is like A33. However, this is not workarounded when
developing the driver, which makes IRQ not working.
Fix the IRQ bank base.
Fixes: 56d9e4a76039 ("pinctrl: sunxi: add driver for V3s SoC")
This patch only applies on the devel branch so I don't see why it is tagged
Signed-off-by: Icenowy Zheng <icenowy@xxxxxxx>
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