[PATCH] x86/mm: Rip out the TLB benchmarking knob

[Borislav Petkov]

On Sat, Oct 14, 2017 at 03:49:12AM -0700, tip-bot for Andy Lutomirski wrote:
> Commit-ID:  b956575bed91ecfb136a8300742ecbbf451471ab
> Gitweb:     https://git.kernel.org/tip/b956575bed91ecfb136a8300742ecbbf451471ab
> Author:     Andy Lutomirski <luto@xxxxxxxxxx>
> AuthorDate: Mon, 9 Oct 2017 09:50:49 -0700
> Committer:  Ingo Molnar <mingo@xxxxxxxxxx>
> CommitDate: Sat, 14 Oct 2017 09:21:24 +0200
> 
> x86/mm: Flush more aggressively in lazy TLB mode

Andy,

I know you're busy so lemme send out the piece removing the benchmarking
knob. The good thing is, if you revert this patch, you get the knob back
so it is actually there for those who wanna do benchmarking :-)

It boots, but please check me nevertheless.

Thx.

---
From: Borislav Petkov <bp@xxxxxxx>
Date: Sat, 14 Oct 2017 14:11:14 +0200
Subject: [PATCH] x86/mm: Rip out the TLB benchmarking knob

This is not really useful to have it upstream as it is only for
benchmarking PCID vs !PCID and once the code is settled it will become
one useless knob.

So rip it out. Reverting this commit gives the functionality back to
those who still want to benchmark, so win-win. :)

Signed-off-by: Borislav Petkov <bp@xxxxxxx>
---
 arch/x86/include/asm/tlbflush.h |  7 -----
 arch/x86/mm/tlb.c               | 62 ++---------------------------------------
 2 files changed, 3 insertions(+), 66 deletions(-)

diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index d362161d3291..447ef4cd7301 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -83,13 +83,6 @@ static inline u64 inc_mm_tlb_gen(struct mm_struct *mm)
 #endif
 
 /*
- * If tlb_use_lazy_mode is true, then we try to avoid switching CR3 to point
- * to init_mm when we switch to a kernel thread (e.g. the idle thread).  If
- * it's false, then we immediately switch CR3 when entering a kernel thread.
- */
-DECLARE_STATIC_KEY_TRUE(tlb_use_lazy_mode);
-
-/*
  * 6 because 6 should be plenty and struct tlb_state will fit in
  * two cache lines.
  */
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 658bf0090565..7d410b25d9aa 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -30,8 +30,6 @@
 
 atomic64_t last_mm_ctx_id = ATOMIC64_INIT(1);
 
-DEFINE_STATIC_KEY_TRUE(tlb_use_lazy_mode);
-
 static void choose_new_asid(struct mm_struct *next, u64 next_tlb_gen,
 			    u16 *new_asid, bool *need_flush)
 {
@@ -227,7 +225,9 @@ void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 	if (this_cpu_read(cpu_tlbstate.loaded_mm) == &init_mm)
 		return;
 
-	if (static_branch_unlikely(&tlb_use_lazy_mode)) {
+	if (static_cpu_has(X86_FEATURE_PCID)) {
+		switch_mm(NULL, &init_mm, NULL);
+	} else {
 		/*
 		 * There's a significant optimization that may be possible
 		 * here.  We have accurate enough TLB flush tracking that we
@@ -238,8 +238,6 @@ void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 		 * tlb_remove_page() happens.
 		 */
 		this_cpu_write(cpu_tlbstate.is_lazy, true);
-	} else {
-		switch_mm(NULL, &init_mm, NULL);
 	}
 }
 
@@ -626,57 +624,3 @@ static int __init create_tlb_single_page_flush_ceiling(void)
 	return 0;
 }
 late_initcall(create_tlb_single_page_flush_ceiling);
-
-static ssize_t tlblazy_read_file(struct file *file, char __user *user_buf,
-				 size_t count, loff_t *ppos)
-{
-	char buf[2];
-
-	buf[0] = static_branch_likely(&tlb_use_lazy_mode) ? '1' : '0';
-	buf[1] = '\n';
-
-	return simple_read_from_buffer(user_buf, count, ppos, buf, 2);
-}
-
-static ssize_t tlblazy_write_file(struct file *file,
-		 const char __user *user_buf, size_t count, loff_t *ppos)
-{
-	bool val;
-
-	if (kstrtobool_from_user(user_buf, count, &val))
-		return -EINVAL;
-
-	if (val)
-		static_branch_enable(&tlb_use_lazy_mode);
-	else
-		static_branch_disable(&tlb_use_lazy_mode);
-
-	return count;
-}
-
-static const struct file_operations fops_tlblazy = {
-	.read = tlblazy_read_file,
-	.write = tlblazy_write_file,
-	.llseek = default_llseek,
-};
-
-static int __init init_tlb_use_lazy_mode(void)
-{
-	if (boot_cpu_has(X86_FEATURE_PCID)) {
-		/*
-		 * Heuristic: with PCID on, switching to and from
-		 * init_mm is reasonably fast, but remote flush IPIs
-		 * as expensive as ever, so turn off lazy TLB mode.
-		 *
-		 * We can't do this in setup_pcid() because static keys
-		 * haven't been initialized yet, and it would blow up
-		 * badly.
-		 */
-		static_branch_disable(&tlb_use_lazy_mode);
-	}
-
-	debugfs_create_file("tlb_use_lazy_mode", S_IRUSR | S_IWUSR,
-			    arch_debugfs_dir, NULL, &fops_tlblazy);
-	return 0;
-}
-late_initcall(init_tlb_use_lazy_mode);
-- 
2.13.0

-- 
Regards/Gruss,
    Boris.

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