[PATCH v3 07/34] clk: axs10x: change i2s_pll_round_rate return logic

From: Bryan O'Donoghue
Date: Mon Jan 01 2018 - 14:43:42 EST


This patch updates the round_rate() logic here to return zero instead of a
negative number on error.

In conjunction with higher-level changes associated with acting on the
return value of clk_ops->round_rate() it is then possible to have
clk_ops->round_rate() return values from 1 Hz to ULONG_MAX Hz instead of
the current limitation of 1 Hz to LONG_MAX Hz.

Signed-off-by: Bryan O'Donoghue <pure.logic@xxxxxxxxxxxxxxxxx>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@xxxxxxxxxxxx>
Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
Cc: Stephen Boyd <sboyd@xxxxxxxxxxxxxx>
Cc: linux-clk@xxxxxxxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx
---
drivers/clk/axs10x/i2s_pll_clock.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/axs10x/i2s_pll_clock.c b/drivers/clk/axs10x/i2s_pll_clock.c
index 061260c..20f7ebf 100644
--- a/drivers/clk/axs10x/i2s_pll_clock.c
+++ b/drivers/clk/axs10x/i2s_pll_clock.c
@@ -119,14 +119,14 @@ static unsigned long i2s_pll_round_rate(struct clk_hw *hw, unsigned long rate,

if (!pll_cfg) {
dev_err(clk->dev, "invalid parent rate=%ld\n", *prate);
- return -EINVAL;
+ return 0;
}

for (i = 0; pll_cfg[i].rate != 0; i++)
if (pll_cfg[i].rate == rate)
return rate;

- return -EINVAL;
+ return 0;
}

static int i2s_pll_set_rate(struct clk_hw *hw, unsigned long rate,
--
2.7.4