Re: AMD EPYC microcode update bug?

[Gabriel C]

On 10.01.2018 00:06, Gabriel C wrote:
> 2018-01-09 23:47 GMT+01:00 Tom Lendacky <thomas.lendacky@xxxxxxx>:
> > On 1/9/2018 4:28 PM, Gabriel C wrote:
> > > Hello ,
> > >
> > > I'm testing an EPYC system right now with 2 EPYC 7281 16-Core Processors.
> > >
> > > I'm on 4.15.0-rc7 and tested an update to microcode_amd_fam17h.bin.
> > >
> > > First run was made by using the early microcode option with dracut[1]
> > > so loading from a initrd. the driver reported 63 updated CPUs while CPU0
> > > got still old microcode.
> >
> > I'm guessing that memory encryption is enabled, correct?  I've submitted a
> > patch series to perform early initrd decryption for just this problem. I'm
> > incorporating some minor feedback and getting ready to submit the next
> > version.
>
> Yes is correct I use mem_encrypt=on and SMT on in BIOS.
>
> Can you give me an link to the patch series ?
>
> > In the meantime, if you specify mem_encrypt=off on the kernel command line
> > it should show CPU0 updated properly (with mem_encrypt=on and SMT enabled,
> > I believe it really does get updated when the sibling hread is updated -
> > do a rdmsr of 0x0000008b to verify).
>
> I give that an test in a bit , the box is running now some test for a
> different EPYC issue :)
>
> ( https://community.amd.com/thread/224000 )


With mem_encrypt=off all is working fine from a initrd with SMT ON

Reagrds,

Gabriel C