Re: [RESEND,3/4] i2c: mpc: fix PORDEVSR2 mask for MPC8533/44

From: Wolfram Sang
Date: Mon Jan 15 2018 - 13:22:09 EST


On Thu, Dec 07, 2017 at 05:20:02PM +0700, Arseny Solokha wrote:
> According to the reference manuals for the corresponding SoCs, SEC
> frequency ratio configuration is indicated by bit 26 of the POR Device
> Status Register 2. Consequently, SEC_CFG bit should be tested by mask 0x20,
> not 0x80. Testing the wrong bit leads to selection of wrong I2C clock
> prescaler on those SoCs.
>
> Signed-off-by: Arseny Solokha <asolokha@xxxxxxxxxx>

Applied to for-next, thanks!

Attachment: signature.asc
Description: PGP signature