Use arm64's scheme for registering first-level IRQ handlers on RISC-V

From: Palmer Dabbelt
Date: Thu Jan 18 2018 - 11:11:04 EST


This patch set has been sitting around for a while, but it got a bit lost in
the shuffle. In RISC-V land we currently couple do_IRQ (the C entry point for
interrupt handling) to our first-level interrupt controller. While this isn't
completely crazy (as the first-level interrupt controller is specified by the
ISA), it is a bit awkward.

This patch set decouples our trap handler from our first-level IRQ chip driver
by copying what a handful of other architectures are doing. This does add an
additional load to the interrupt handling path, but there's a handful of
performance problems in there that I've been meaning to look at so I don't mind
adding another one for now. The advantage is that our irqchip driver is
decoupled from our arch port, at least at compile time.