Re: [PATCH v2 4/5] x86/msr: Add definitions for new speculation control MSRs

[Woodhouse, David]

On Tue, 2018-01-23 at 19:31 +0100, Greg KH wrote:
> On Tue, Jan 23, 2018 at 10:27:24AM -0800, Dave Hansen wrote:
> > 
> > On 01/23/2018 08:52 AM, David Woodhouse wrote:
> > > 
> > > +#define MSR_IA32_ARCH_CAPABILITIES	0x0000010a
> > > +#define ARCH_CAP_RDCL_NO		(1 << 0)ÂÂÂ/* Not susceptible to Meltdown */
> > > +#define ARCH_CAP_IBRS_ALL		(1 << 1)ÂÂÂ/* Enhanced IBRS support */
> > Do we want to spell out the silly Intel acronym?ÂÂI don't know how we
> > fit it on the right side, but I do think we need to do it _somewhere_.
> > We need the code to stand on its own to some degree and not subject the
> > masses to reading the spec to understand the code.
>
> Yes please, take pity on us :)

The comment says 'Not susceptible to Meltdown', and it's used in a
context where it disabled the X86_CPU_BUG_MELTDOWN bit. I think that's
a *bit* of a hint about what it does.

Expanding the silly Intel acronym doesn't give you any useful
information except perhaps which pointless bits of word soup they
happened to string together in the spec.

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