Re: [PATCH 5/8] arm64: dts: renesas: r8a77995: Add LVDS support

From: Kieran Bingham
Date: Thu Feb 15 2018 - 09:25:08 EST


On 15/02/18 14:10, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Thursday, 15 February 2018 10:38:20 EET Kieran Bingham wrote:
>> From: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
>>
>> The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@xxxxxxxxxxxxxxxx>
>> ---
>> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 52 ++++++++++++++++++++++++++++
>> 1 file changed, 52 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index
>> a57d5fecf79c..7851e37cfff1 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
>> @@ -773,18 +773,70 @@
>> port@1 {
>> reg = <1>;
>> du_out_lvds0: endpoint {
>> + remote-endpoint = <&du_out_lvds0>;
>> };
>> };
>>
>> port@2 {
>> reg = <2>;
>> du_out_lvds1: endpoint {
>> + remote-endpoint = <&du_out_lvds1>;
>
> It's interesting how the DU ports reference themselves :-)

Ah, yes - that's ... that's a feature...

--
Kieran



>> };
>> };
>> };
>> };
>> };
>>
>> + lvds0: lvds@feb90000 {
>> + compatible = "renesas,lvds-r8a77995";
>> + reg = <0 0xfeb90000 0 0x20>;
>> + clocks = <&cpg CPG_MOD 727>;
>> + status = "disabled";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + lvds0_in: endpoint {
>> + remote-endpoint = <&du_out_lvds0>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> + lvds0_out: endpoint {
>> + };
>> + };
>> + };
>> + };
>> +
>> + lvds1: lvds@feb90100 {
>> + compatible = "renesas,lvds-r8a77995";
>> + reg = <0 0xfeb90100 0 0x20>;
>> + clocks = <&cpg CPG_MOD 727>;
>> + status = "disabled";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + lvds1_in: endpoint {
>> + remote-endpoint = <&du_out_lvds1>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> + lvds1_out: endpoint {
>> + };
>> + };
>> + };
>> + };
>> +
>> timer {
>> compatible = "arm,armv8-timer";
>> interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
>> IRQ_TYPE_LEVEL_LOW)>,
>