[PATCH 1/5] arm64: entry: isb in el1_irq

From: Yury Norov
Date: Thu Apr 05 2018 - 13:18:50 EST

Kernel text patching framework relies on IPI to ensure that other
SMP cores observe the change. Target core calls isb() in IPI handler
path, but not at the beginning of el1_irq entry. There's a chance
that modified instruction will appear prior isb(), and so will not be

This patch inserts isb early at el1_irq entry to avoid that chance.

Signed-off-by: Yury Norov <ynorov@xxxxxxxxxxxxxxxxxx>
arch/arm64/kernel/entry.S | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index ec2ee720e33e..9c06b4b80060 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -593,6 +593,7 @@ ENDPROC(el1_sync)

.align 6
+ isb // pairs with aarch64_insn_patch_text
kernel_entry 1