Re: [PATCH 2/2] perf: add arm64 smmuv3 pmu driver

[Yisheng Xie]

Hi Shameerali,

On 2018/4/18 19:05, Shameerali Kolothum Thodi wrote:
> 
> 
>> -----Original Message-----
>> From: linux-arm-kernel [mailto:linux-arm-kernel-bounces@xxxxxxxxxxxxxxxxxxx]
>> On Behalf Of Yisheng Xie
>> Sent: Thursday, March 29, 2018 8:04 AM
>> To: Neil Leeder <nleeder@xxxxxxxxxxxxxx>; Will Deacon
>> <will.deacon@xxxxxxx>; Mark Rutland <mark.rutland@xxxxxxx>
>> Cc: Mark Langsdorf <mlangsdo@xxxxxxxxxx>; Jon Masters
>> <jcm@xxxxxxxxxx>; Timur Tabi <timur@xxxxxxxxxxxxxx>; linux-
>> kernel@xxxxxxxxxxxxxxx; Mark Brown <broonie@xxxxxxxxxx>; Mark Salter
>> <msalter@xxxxxxxxxx>; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
>> Subject: Re: [PATCH 2/2] perf: add arm64 smmuv3 pmu driver
>>
>> Hi Neil,
>>
>> On 2017/8/5 3:59, Neil Leeder wrote:
>>> +	mem_resource_0 = platform_get_resource(pdev, IORESOURCE_MEM,
>> 0);
>>> +	mem_map_0 = devm_ioremap_resource(&pdev->dev,
>> mem_resource_0);
>>> +
>> Can we use devm_ioremap instead? for the reg_base of smmu_pmu is
>> IMPLEMENTATION DEFINED. If the reg of smmu_pmu is inside smmu,
>> devm_ioremap_resource will failed and return -EBUSY, eg.:
>>
>>  smmu reg ranges:		0x180000000 ~ 0x1801fffff
>>  its smmu_pmu reg ranges:	0x180001000 ~ 0x180001fff
> 
> I think this will not solve the issue completely as the smmu v3 driver 
> uses devm_ioremap_resource() currently and that will fail because of
> the overlap.

Right, I get your point.

> 
> Please find the discussion here:
> https://lkml.org/lkml/2018/1/31/235

Thanks for the infomation.

Thanks
Yisheng

> 
> Thanks,
> Shameer
> 
>>> +	if (IS_ERR(mem_map_0)) {
>>> +		dev_err(&pdev->dev, "Can't map SMMU PMU @%pa\n",
>>> +			&mem_resource_0->start);
>>> +		return PTR_ERR(mem_map_0);
>>> +	}
>>> +
>>> +	smmu_pmu->reg_base = mem_map_0;
>>> +	smmu_pmu->pmu.name =
>>> +		devm_kasprintf(&pdev->dev, GFP_KERNEL, "smmu_0_%llx",
>>> +			       (mem_resource_0->start) >> SMMU_PA_SHIFT);
>>> +
>>> +	if (!smmu_pmu->pmu.name) {
>>> +		dev_err(&pdev->dev, "Failed to create PMU name");
>>> +		return -EINVAL;
>>> +	}
>>> +
>>> +	ceid_64 = readq(smmu_pmu->reg_base + SMMU_PMCG_CEID0);
>>> +	ceid[0] = ceid_64 & GENMASK(31, 0);
>>> +	ceid[1] = ceid_64 >> 32;
>>> +	ceid_64 = readq(smmu_pmu->reg_base + SMMU_PMCG_CEID1);
>>> +	ceid[2] = ceid_64 & GENMASK(31, 0);
>>> +	ceid[3] = ceid_64 >> 32;
>>> +	bitmap_from_u32array(smmu_pmu->supported_events,
>> SMMU_MAX_EVENT_ID,
>>> +			     ceid, SMMU_NUM_EVENTS_U32);
>>> +
>>> +	/* Determine if page 1 is present */
>>> +	if (readl(smmu_pmu->reg_base + SMMU_PMCG_CFGR) &
>>> +	    SMMU_PMCG_CFGR_RELOC_CTRS) {
>>> +		mem_resource_1 = platform_get_resource(pdev,
>> IORESOURCE_MEM, 1);
>>> +		mem_map_1 = devm_ioremap_resource(&pdev->dev,
>> mem_resource_1);
>>> +
>> The same as above.
>>
>> Thanks
>> Yisheng
>>
>>> +		if (IS_ERR(mem_map_1)) {
>>> +			dev_err(&pdev->dev, "Can't map SMMU PMU
>> @%pa\n",
>>> +				&mem_resource_1->start);
>>> +			return PTR_ERR(mem_map_1);
>>> +		}
>>> +		smmu_pmu->reloc_base = mem_map_1;
>>> +	} else {
>>> +		smmu_pmu->reloc_base = smmu_pmu->reg_base;
>>> +	}
>>> +
>>> +	irq = platform_get_irq(pdev, 0);
>>> +	if (irq < 0) {
>>> +		dev_err(&pdev->dev,
>>> +			"Failed to get valid irq for smmu @%pa\n",
>>> +			&mem_resource_0->start);
>>> +		return irq;
>>> +	}
>>
>>
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> 
> .
>