Re: [V3] platform/x86: intel_pmc_core: Add CNP SLPS0 debug registers
From: Andy Shevchenko
Date: Wed Jun 13 2018 - 12:40:54 EST
On Wed, Jun 13, 2018 at 5:07 PM, Rajneesh Bhardwaj
> On Fri, Jun 08, 2018 at 05:02:37PM -0700, Box, David E wrote:
> I am ok with the design and approach and also verified it on a Cannonlake
> system. I wont insist for a V4 unless Andy feels a need for respin but there
> are minor things that were missed.
> Also ISCLK_OC / ISCLK_MAIN suggestion is missing.
I missed this in discussion, so, please send v4 with settled fixes.
Meanwhile I keep v3 in my review and testing queue, thanks!
With Best Regards,