Re: [PATCH v2] mmc: sdhci-esdhc-imx: allow 1.8V modes without 100/200MHz pinctrl states

From: Ulf Hansson
Date: Thu Jul 05 2018 - 07:23:20 EST

On 4 July 2018 at 17:07, Stefan Agner <stefan@xxxxxxxx> wrote:
> If pinctrl nodes for 100/200MHz are missing, the controller should
> not select any mode which need signal frequencies 100MHz or higher.
> To prevent such speed modes the driver currently uses the quirk flag
> SDHCI_QUIRK2_NO_1_8_V. This works nicely for SD cards since 1.8V
> signaling is required for all faster modes and slower modes use 3.3V
> signaling only.
> However, there are eMMC modes which use 1.8V signaling and run below
> 100MHz, e.g. DDR52 at 1.8V. With using SDHCI_QUIRK2_NO_1_8_V this
> mode is prevented. When using a fixed 1.8V regulator as vqmmc-supply
> the stack has no valid mode to use. In this tenuous situation the
> kernel continuously prints voltage switching errors:
> mmc1: Switching to 3.3V signalling voltage failed
> Avoid using SDHCI_QUIRK2_NO_1_8_V and prevent faster modes by
> altering the SDHCI capability register. With that the stack is able
> to select 1.8V modes even if no faster pinctrl states are available:
> # cat /sys/kernel/debug/mmc1/ios
> ...
> timing spec: 8 (mmc DDR52)
> signal voltage: 1 (1.80 V)
> ...
> Link:
> Signed-off-by: Stefan Agner <stefan@xxxxxxxx>

I am fine with this. Do you want me to apply this for now, to get it tested?

I guess its also material for stable and as fix?

In regards to the printed warning, it sounds to me like a different
issue, which we can solve on top. Right?


Kind regards