Re: [PATCH v7 3/4] rtc: ds1307: add offset sysfs for mt41txx chips.

[Giulio Benetti]

Hi Alexandre,

Il 18/07/2018 10:49, Giulio Benetti ha scritto:
> m41txx chips can hold a calibration value to get correct clock bias.
>
> Add offset handling (ranging between -63ppm and 126ppm) via sysfs.
>
> Signed-off-by: Giulio Benetti <giulio.benetti@xxxxxxxxxxxxxxxx>
> ---
> V6 => V7:
> * changed PPM to PPB as rtc sysfs offset handles PPB
>   drivers/rtc/rtc-ds1307.c | 77 ++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 77 insertions(+)
>
> diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
> index 0162a600ff1b..b2ef9defc349 100644
> --- a/drivers/rtc/rtc-ds1307.c
> +++ b/drivers/rtc/rtc-ds1307.c
> @@ -114,6 +114,20 @@ enum ds_type {
>   #	define RX8025_BIT_VDET		0x40
>   #	define RX8025_BIT_XST		0x20
>   
> +#define M41TXX_REG_CONTROL	0x07
> +#	define M41TXX_BIT_OUT		0x80
> +#	define M41TXX_BIT_FT		0x40
> +#	define M41TXX_BIT_CALIB_SIGN	0x20
> +#	define M41TXX_M_CALIBRATION	0x1f

Sorry, I've forgot to use BIT().
I would also use GENMASK() for M41TXX_M_CALIBRATION.
I correct and resend asap.

Giulio