[PATCH 26/40] mmc: tegra: Enable workaround for tuning transfer mode bug

From: Aapo Vienamo
Date: Wed Aug 01 2018 - 12:34:06 EST


Set SDHCI_QUIRK2_TUNE_SKIP_XFERMODE_REG_PROG on Tegra210 and Tegra186.
This prevents the controller from hanging during tuning. This bug does
not seem to be documented but it's handled in a similar way in the
downstream kernel.

Signed-off-by: Aapo Vienamo <avienamo@xxxxxxxxxx>
---
drivers/mmc/host/sdhci-tegra.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 7e6f928..6daee7e 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -833,7 +833,8 @@ static const struct sdhci_pltfm_data sdhci_tegra210_pdata = {
SDHCI_QUIRK_NO_HISPD_BIT |
SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
- .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
+ .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+ SDHCI_QUIRK2_TUNE_SKIP_XFERMODE_REG_PROG,
.ops = &tegra210_sdhci_ops,
};

@@ -859,7 +860,8 @@ static const struct sdhci_pltfm_data sdhci_tegra186_pdata = {
* to 32-bit dma mask. Ideally 40-bit dma mask would work,
* But it is not supported as of now.
*/
- SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
+ SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
+ SDHCI_QUIRK2_TUNE_SKIP_XFERMODE_REG_PROG,
.ops = &tegra210_sdhci_ops,
};

--
2.7.4