Re: [PATCH v3 13/17] x86/xen: enable Hygon support to Xen

[Juergen Gross]

On 11/08/18 16:34, Boris Ostrovsky wrote:
> On 08/11/2018 09:29 AM, Pu Wen wrote:
>> To make Xen work correctly on Hygon platforms, reuse AMD's Xen support
>> code path and add vendor check for Hygon along with AMD.
>>
>> Signed-off-by: Pu Wen <puwen@xxxxxxxx>
>> ---
>>  arch/x86/xen/pmu.c | 15 ++++++++++++---
>>  1 file changed, 12 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
>> index 7d00d4a..1053dda 100644
>> --- a/arch/x86/xen/pmu.c
>> +++ b/arch/x86/xen/pmu.c
>> @@ -90,6 +90,12 @@ static void xen_pmu_arch_init(void)
>>  			k7_counters_mirrored = 0;
>>  			break;
>>  		}
>> +	} else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
>> +		amd_num_counters = F10H_NUM_COUNTERS;
> 
> I haven't looked in details at Zen's PMU but the PMC section in the spec
> starts with
> Â "There are six core performance events counters per thread..."
> 
> 
> 
>> +		amd_counters_base = MSR_K7_PERFCTR0;
>> +		amd_ctrls_base = MSR_K7_EVNTSEL0;
>> +		amd_msr_step = 1;
>> +		k7_counters_mirrored = 0;
>>  	} else {
>>  		uint32_t eax, ebx, ecx, edx;
>>  
>> @@ -285,7 +291,8 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
>>  
>>  bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
>>  {
>> -	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
>> +	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
>> +	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
> 
> 
> 'if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)' please.

Really? Xen supports Centaur, too.


Juergen