[PATCH 2/2] dt-bindings: Document the Synopsys GPIO via CREG bindings

From: Eugeniy Paltsev
Date: Thu Aug 23 2018 - 11:00:35 EST


This patch adds documentation of device tree bindings for the Synopsys
GPIO via CREG driver.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@xxxxxxxxxxxx>
---
.../devicetree/bindings/gpio/snps,creg-gpio.txt | 48 ++++++++++++++++++++++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt

diff --git a/Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt b/Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt
new file mode 100644
index 000000000000..2ab1b49eee7b
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt
@@ -0,0 +1,48 @@
+GPIO via CREG (Control REGisers) driver
+
+To control such strangely mapped MMIO outputs:
+
+31 11 8 7 5 0 < bit number
+| | | | | |
+[ not used | gpio-1 | shift-1 | gpio-0 | shift-0 ] < 32 bit MMIO register
+ ^ ^
+ | |
+ | write 0x2 == set output to "1" (on)
+ | write 0x3 == set output to "0" (off)
+ |
+ write 0x1 == set output to "1" (on)
+ write 0x4 == set output to "0" (off)
+
+
+Required properties:
+- compatible : "snps,creg-gpio"
+- reg : Exactly one register range with length 0x4.
+- #gpio-cells : Should be one - the pin number.
+- gpio-controller : Marks the device node as a GPIO controller.
+- snps,ngpios: Number of GPIO pins.
+- snps,bit-per-line: Number of bits per each gpio line (see picture).
+ Array the size of "snps,ngpios"
+- snps,shift: Shift (in bits) of the each GPIO field from the previous one in
+ register (see picture). Array the size of "snps,ngpios"
+- snps,on-val: Value should be set in corresponding field to set
+ output to "1" (see picture). Array the size of "snps,ngpios"
+- snps,off-val: Value should be set in corresponding field to set
+ output to "0" (see picture). Array the size of "snps,ngpios"
+
+Optional properties:
+- snps,default-val: default output field values. Array the size of "snps,ngpios"
+
+Example (see picture):
+
+gpio: gpio@f00014b0 {
+ compatible = "snps,creg-gpio";
+ reg = <0xf00014b0 0x4>;
+ gpio-controller;
+ #gpio-cells = <1>;
+ snps,ngpios = <2>;
+ snps,shift = <5 1>;
+ snps,bit-per-line = <2 3>;
+ snps,on-val = <2 1>;
+ snps,off-val = <3 4>;
+ snps,default-val = <2 1>;
+};
--
2.14.4