Re: [PATCH 3/4] mm/tlb, x86/mm: Support invalidating TLB caches for RCU_TABLE_FREE
From: Peter Zijlstra
Date: Mon Aug 27 2018 - 03:47:32 EST
On Mon, Aug 27, 2018 at 03:00:08PM +1000, Nicholas Piggin wrote:
> On Fri, 24 Aug 2018 13:39:53 +0200
> Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
> > On Fri, Aug 24, 2018 at 01:32:14PM +0200, Peter Zijlstra wrote:
> > > Hurm.. look at commit:
> > >
> > > e77b0852b551 ("mm/mmu_gather: track page size with mmu gather and force flush if page size change")
> > Ah, good, it seems that already got cleaned up a lot. But it all moved
> > into the power code.. blergh.
> I lost track of what the problem is here?
Aside from the commit above being absolute crap (which did get fixed up,
luckily) I would really like to get rid of all arch specific mmu_gather.
We can have opt-in bits to the generic code, but the endless back and
forth between common and arch code is an utter pain in the arse.
And there's only like 4 architectures that still have a custom
sh is trivial, arm seems doable, with a bit of luck we can do 'rm -rf
arch/ia64' leaving us with s390.
After that everyone uses the common code and we can clean up.
> For powerpc, tlb_start_vma is not the right API to use for this because
> it wants to deal with different page sizes within a vma.
Yes.. I see that. tlb_remove_check_page_size_change() really is a rather
ugly thing, it can cause loads of TLB flushes. Do you really _have_ to
do that? The way ARM and x86 work is that using INVLPG in a 4K stride is
still correct for huge pages, inefficient maybe, but so is flushing
every other page because 'sparse' transparant-huge-pages.