[RCFÂPATCH v2 1/2] dt-bindings: pwm: imx: Allow switching PWM output between PWM and GPIO

From: VokÃÄ Michal
Date: Wed Oct 10 2018 - 05:33:35 EST

Output of the PWM block on i.MX SoCs is always low when the block is
disabled. This can cause issues when inverted PWM polarity is needed.
With inverted polarity a duty cycle = 0% corresponds to high level on
the output. Now, when PWM is disabled its output instantly goes low
which corresponds to duty cycle = 100%.

To get a truly inverted PWM output two pinctrl states of the PWM pin
can be used. Configure the pin to GPIO function when PWM is disabled
and switch back to PWM function whenever non-zero duty cycle is needed.

Signed-off-by: Michal VokÃÄ <michal.vokac@xxxxxxxxx>
Changes in v2:
- Do not use the "default" pinctrl state for GPIO.
- Use two new "pwm" and "gpio" pinctrl states.
- Add a new pwm-gpios signal.

Documentation/devicetree/bindings/pwm/imx-pwm.txt | 51 +++++++++++++++++++++++
1 file changed, 51 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
index c61bdf8..bd5b6bd 100644
--- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
@@ -14,6 +14,17 @@ See the clock consumer binding,
- interrupts: The interrupt for the pwm controller

+Optional properties:
+- pinctrl: For i.MX27 and newer SoCs. Use "pwm" and "gpio" specific pinctrls
+ instead of the "default" to configure the PWM pin to GPIO and PWM function.
+ It allows control over the pin output level when the PWM block is disabled.
+ This is useful if you use the PWM for single purpose and you need inverted
+ polarity of the PWM signal. See "Inverted PWM output" section bellow.
+- pwm-gpios: Specify the GPIO pin that will act as the PWM output. This should
+ be the same pin as is used for normal PWM output. Define the pin as
+ GPIO_ACTIVE_LOW to get HIGH level on the output when PWM is disabled. See
+ "Inverted PWM output" section bellow.

pwm1: pwm@53fb4000 {
@@ -25,3 +36,43 @@ pwm1: pwm@53fb4000 {
clock-names = "ipg", "per";
interrupts = <61>;
+Inverted PWM output
+The i.MXÂSoC has such limitation that whenever a pin is configured as a PWM
+output, the output level on the pin is always low when the PWM block is
+disabled. The low output level is actively driven by the output stage of the
+PWM block and can not be overridden by pull-up. It also does not matter what
+PWM polarity a PWM client (e.g. backlight) requested.
+To gain control of the output level in PWM disabled state two pinctrl states
+can be used. A "gpio" state and a "pwm" state. In the gpio state the pin is
+configured as a GPIO. In the pwm state the pin is configured as a normal PWM
+output. In the gpio state the output level can be controlled by actively
+driving the output by the pwm-gpios signal. This setup assures that the PWM
+output is at the required level that corresponds to duty cycle = 0 when PWM
+is disabled.
+&pwm1 {
+ pinctrl-names = "pwm", "gpio";
+ pinctrl-0 = <&pinctrl_backlight_pwm>;
+ pinctrl-1 = <&pinctrl_backlight_gpio>;
+ pwm-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>
+pinctrl_backlight_gpio: pwm1grp-gpio {
+ fsl,pins = <
+ /* GPIO with 100kOhm pull-up */
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0xb000
+ >;
+pinctrl_backlight_pwm: pwm1grp-pwm {
+ fsl,pins = <
+ /* PWM output */
+ >;