Re: [PATCH V9 07/21] csky: MMU and page table management

From: Guo Ren
Date: Wed Oct 17 2018 - 22:06:23 EST


On Wed, Oct 17, 2018 at 05:06:56PM +0200, Arnd Bergmann wrote:
> On Tue, Oct 16, 2018 at 5:01 AM Guo Ren <ren_guo@xxxxxxxxx> wrote:
> >
> > This patch adds files related to memory management and here is our
> > memory-layout:
> >
> > Fixmap : 0xffc02000 â 0xfffff000 (4 MB - 12KB)
> > Pkmap : 0xff800000 â 0xffc00000 (4 MB)
> > Vmalloc : 0xf0200000 â 0xff000000 (238 MB)
> > Lowmem : 0x80000000 â 0xc0000000 (1GB)
> >
> > abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem.
> > abiv2 CPUs are all PIPT cache and they could support highmem.
> >
> > Lowmem is directly mapped by msa0 & msa1 reg, and we needn't setup
> > memory page table for it.
> >
> > Link:https://lore.kernel.org/lkml/20180518215548.GH17671@xxxxxxxxxxxxxxxxxxxxx/
> > Signed-off-by: Guo Ren <ren_guo@xxxxxxxxx>
> > Cc: Christoph Hellwig <hch@xxxxxxxxxxxxx>
> > Cc: Arnd Bergmann <arnd@xxxxxxxx>
>
> Reviewed-by: Arnd Bergmann <arnd@xxxxxxxx>
>
> Christoph had all the useful comments on this one, I just checked that I didn't
> spot anything beyond that.
Yes, Christoph help a lot and find a critical bug of "sync_dma > 4K".

Best Regards
Guo Ren