Re: CRC errors between mvneta and macb
From: Andrew Lunn
Date: Mon Oct 22 2018 - 14:19:35 EST
> I dug more on the subject, and I think I found what Marvell's PHY/MAC
> doesn't like.
What PHY is being used?
> After analyzing the ethernet frame on the Davicom PHY's output (pin
> TX+), I find out that the FCS errors occurs when the ethernet preamble
> is longer than 56bits. (something like 58 or 60 bits)
Some Marvell PHYs have a register bit which might be of interest: Page
2, register 16, bit 6.
0 = Pad odd nibble preambles in copper receive packets.
1 = Pass as is and do not pad odd nibble preambles in