Re: [PATCH v6 6/8] clk: tegra20: Turn EMC clock gate into divider
From: Thierry Reding
Date: Thu Oct 25 2018 - 10:31:12 EST
On Sun, Oct 21, 2018 at 09:30:50PM +0300, Dmitry Osipenko wrote:
> Kernel should never gate the EMC clock as it causes immediate lockup, so
> removing clk-gate functionality doesn't affect anything. Turning EMC clk
> gate into divider allows to implement glitch-less EMC scaling, avoiding
> reparenting to a backup clock.
> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
> Acked-by: Peter De Schrijver <pdeschrijver@xxxxxxxxxx>
> Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx>
> drivers/clk/tegra/clk-tegra20.c | 36 ++++++++++++++++++++++++---------
> 1 file changed, 26 insertions(+), 10 deletions(-)
Applied to for-4.21/clk, thanks.
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