Re: [PATCH v3 3/3] pinctrl: upboard: Add UP2 pinctrl and gpio driver

From: Linus Walleij
Date: Wed Oct 31 2018 - 17:30:37 EST

Hi Dan,

On Wed, Oct 31, 2018 at 9:45 PM Dan O'Donovan <dan@xxxxxxxxxx> wrote:

> The UP2 board features a Raspberry Pi compatible pin header (HAT) and a
> board-specific expansion connector (EXHAT). Both expose assorted
> functions from either the SoC (such as GPIO, I2C, SPI, UART...) or other
> on-board devices (ADC, FPGA IP blocks...).
> These lines are routed through an on-board FPGA. The platform controller
> in its stock firmware provides register fields to change:
> - Line enable (FPGA pins enabled / high impedance)
> - Line direction (SoC driven / FPGA driven)
> To enable using SoC GPIOs on the pin header, this arrangement requires
> both configuring the platform controller, and updating the SoC pad
> registers in sync.
> Add a frontend pinctrl/GPIO driver that registers a new set of GPIO
> lines for the header pins. When these are requested, the driver
> propagates this request to the backend SoC pinctrl/GPIO driver by
> grabbing a GPIO descriptor for the matching SoC GPIO line. The needed
> mapping for this is retrieved via ACPI properties.
> Signed-off-by: Dan O'Donovan <dan@xxxxxxxxxx>

It appears you missed my review comments so please read them
and reply or respin the patch accordingly.

Linus Walleij