Re: [PATCH] irqchip/mmp: only touch the PJ4 & FIQ bits on enable/disable

[Pavel Machek]

On Mon 2018-09-10 14:04:25, Lubomir Rintel wrote:
> On an OLPC XO 1.75 machine, the "security processor" handles the GPIO 71
> and 72 interrupts. Don't reset the "route to SP" bit (4).
> 
> I'm just assuming the bit 4 is the "route to SP" bit -- it fixes the
> SP-based keyboard for me and <mach-mmp/regs-icu.h> defines
> ICU_INT_ROUTE_SP_IRQ to be 1 << 4. When asked for a data sheet, Marvell
> told me to fuck off, politely.

"Marvell was not exactly helpful".

> Signed-off-by: Lubomir Rintel <lkundrak@xxxxx>

Acked-by: Pavel Machek <pavel@xxxxxx>

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