Re: [PATCH 05/11] [media] marvell-ccic: don't generate EOF on parallel bus

[Pavel Machek]

On Mon 2018-11-05 08:30:48, Lubomir Rintel wrote:
> The commit 05fed81625bf ("[media] marvell-ccic: add MIPI support for
> marvell-ccic driver") that claimed to add CSI2 turned on C0_EOF_VSYNC for
> parallel bus without a very good explanation.
> 
> That broke camera on OLPC XO-1.75 which precisely uses a sensor on a
> parallel bus. Revert that chunk.
> 
> Tested on an OLPC XO-1.75.
> 
> Fixes: 05fed81625bf755cc67c5864cdfd18b69ea828d1
> Signed-off-by: Lubomir Rintel <lkundrak@xxxxx>

You should really Cc original author and people that signed off on
that patch.
									Pavel
		

>  drivers/media/platform/marvell-ccic/mcam-core.c | 6 ------
>  1 file changed, 6 deletions(-)
> 
> diff --git a/drivers/media/platform/marvell-ccic/mcam-core.c b/drivers/media/platform/marvell-ccic/mcam-core.c
> index d97f39bde9bd..d24e5b7a3bc5 100644
> --- a/drivers/media/platform/marvell-ccic/mcam-core.c
> +++ b/drivers/media/platform/marvell-ccic/mcam-core.c
> @@ -792,12 +792,6 @@ static void mcam_ctlr_image(struct mcam_camera *cam)
>  	 * Make sure it knows we want to use hsync/vsync.
>  	 */
>  	mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, C0_SIFM_MASK);
> -	/*
> -	 * This field controls the generation of EOF(DVP only)
> -	 */
> -	if (cam->bus_type != V4L2_MBUS_CSI2_DPHY)
> -		mcam_reg_set_bit(cam, REG_CTRL0,
> -				C0_EOF_VSYNC | C0_VEDGE_CTRL);
>  }
>  
>  

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