Re: [Question] atomic_fetch_andnot() in nohz_idle_balance()

From: Andrea Parri
Date: Mon Nov 26 2018 - 15:44:26 EST


On Mon, Nov 26, 2018 at 12:37:00PM +0100, Vincent Guittot wrote:
> On Mon, 26 Nov 2018 at 10:30, Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
> >
> > On Wed, Nov 21, 2018 at 11:34:53PM +0100, Andrea Parri wrote:
> > > Hi,
> > >
> > > The comment for the atomic_fetch_andnot() in nohz_idle_balance() says:
> > >
> > > "barrier, pairs with nohz_balance_enter_idle(), ensures ..."
> > >
> > > which, well, does sound a note of warning... ;-)
> > >
> > > I see that nohz_balance_enter_idle() has an smp_mb__after_atomic() but
> > > the comment for the latter suggests that this barrier is pairing with
> > > the smp_mb() in _nohz_idle_balance().
> > >
> > > So, what is the intended pairing barrier for the atomic_fetch_andnot()?
> > > what (which memory accesses) do you want "to order" here?
> >
> > I can't seem to make sense of that comment either; the best I can come
> > up with is that it would order the prior NOHZ_KICK_MASK load vs us then
> > changing it.
> >
> > But that would order against kick_ilb(), not enter_idle.
> >
> > Vincent?
>
> I can't come with a good explanation.
> After looking into my email archive, the only explanation that i have
> is that the comments remains from a previous iteration of the feature
> that was based on a nohz.stats_state mechanism

I'm afraid I still can't help your comment... put in other terms, would
you feel "unconfortable" with _relax()ing the andnot()? (and if so ...)

Andrea