Re: [PATCH v6 10/10] soc: qcom: rpmhpd: Mark mx as a parent for cx

From: Stephen Boyd
Date: Tue Dec 11 2018 - 16:50:30 EST


Quoting Rajendra Nayak (2018-12-11 02:33:23)
>
>
> On 12/11/2018 3:52 PM, Ulf Hansson wrote:
> > On Tue, 11 Dec 2018 at 10:50, Rajendra Nayak <rnayak@xxxxxxxxxxxxxx> wrote:
> >>
> >> Specify the active + sleep and active-only MX power domains as
> >> the parents of the corresponding CX power domains. This will ensure that
> >> performance state requests on CX automatically generate equivalent requests
> >> on MX power domains.
> >>
> >> This is used to enforce a requirement that exists for various
> >> hardware blocks on SDM845 that MX performance state >= CX performance
> >> state for a given operating frequency.
> >
> > I assume that also means the MX power domain must not be power off as
> > long as the CX power domain is powered on?
>
> So with rpmh, there's really no separate on/off control, we just put
> it in the lowest perf state at off.

I think in theory the answer is MX can't be off if CX is on, but in
reality, MX and CX are never turned off, just set to something really
low and even then the constraint applies for MX >= CX. Is that right?

>
> >
> > Just to make sure there are no conflicting hierarchical constraints
> > between idle management and performance state management!?
> >

I'm not sure what idle states mean to the CX and MX domains. Would it be
some sort of idle state governor attached at genpd creation time that
would adjust the main SoC power rails when all devices attached are
idle? Maybe I don't understand how idle states are different from
performance states.

My understanding is that devices using these domains would almost always
expect their clk frequency and clk on/off state to decide what the
performance state is, unless they need to ignore clk state because they
aren't managing clks and bump up the voltage directly when the device is
active. Either way, devices are actively managing the voltage they need
these voltage domains to operate at by using the genpd performance
states APIs.