[PATCH 13/15] arm64: dts: rockchip: add core display support for rk3368

From: Heiko Stuebner
Date: Mon Dec 17 2018 - 07:41:42 EST


Add the display subsystem and vop and hook up the individual
encoder ports.

Signed-off-by: Heiko Stuebner <heiko@xxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 73 ++++++++++++++++++++++++
1 file changed, 73 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index f03f57d96515..0a2523e706ae 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -181,6 +181,11 @@
<&cpu_b2>, <&cpu_b3>;
};

+ display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vop_out>;
+ };
+
psci {
compatible = "arm,psci-0.2";
method = "smc";
@@ -856,6 +861,40 @@
status = "disabled";
};

+ vop: vop@ff930000 {
+ compatible = "rockchip,rk3368-vop";
+ reg = <0x0 0xff930000 0x0 0x2f4>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ power-domains = <&power RK3368_PD_VIO>;
+ resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>,
+ <&cru SRST_LCDC0_DCLK>;
+ reset-names = "axi", "ahb", "dclk";
+ iommus = <&vop_mmu>;
+ status = "disabled";
+
+ vop_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vop_out_hdmi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&hdmi_in_vop>;
+ };
+
+ vop_out_edp: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&edp_in_vop>;
+ };
+
+ vop_out_mipi: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&mipi_in_vop>;
+ };
+ };
+ };
+
vop_mmu: iommu@ff930300 {
compatible = "rockchip,iommu";
reg = <0x0 0xff930300 0x0 0x100>;
@@ -879,6 +918,19 @@
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_in: port@0 {
+ reg = <0>;
+
+ mipi_in_vop: endpoint {
+ remote-endpoint = <&vop_out_mipi>;
+ };
+ };
+ };
};

edp: dp@ff970000 {
@@ -894,6 +946,19 @@
reset-names = "dp";
rockchip,grf = <&grf>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ edp_in: port@0 {
+ reg = <0>;
+
+ edp_in_vop: endpoint {
+ remote-endpoint = <&vop_out_edp>;
+ };
+ };
+ };
};

hdmi: hdmi@ff980000 {
@@ -908,6 +973,14 @@
clock-names = "iahb", "isfr", "cec";
power-domains = <&power RK3368_PD_VIO>;
status = "disabled";
+
+ ports {
+ hdmi_in: port {
+ hdmi_in_vop: endpoint {
+ remote-endpoint = <&vop_out_hdmi>;
+ };
+ };
+ };
};

hevc_mmu: iommu@ff9a0440 {
--
2.19.2