[PATCH V2] DMA Block size configuration prior to CQE

[Sowjanya Komatineni]

As per eMMC5.1 Spec Section 6.6.39.1, DMA Block size should be to 512 B
before enabling command queue.

Tegra SDHCI Host design strictly follows this sequence preventing write
access to SDHCI_BLOCK_SIZE when CQE is set in CQHCI_CFG. Writing to
SDHCI_BLOCK_SIZE register when CQE is enabled results in crash.

This patch is needed for enabling HW Command queue for Tegra SDHCI.

Note: couple more patches are needed for enabling HW CMDQ on Tegra SDHCI.
Based on patch review feedback from Ulf on the other HW Command queue
patch, I will resend new patch series with all these dependency patches
together along with covering letter.

[0] DMA Config prior to CQE
    https://lkml.org/lkml/2018/12/14/1062
[1] SDMMC address range
    https://lkml.org/lkml/2018/12/14/1323
[2] Fix sdhci_do_enable_v4_mode
    https://lkml.org/lkml/2018/12/14/72
[3] Add HW Command Queue for Tegra SDHCI
    https://patchwork.kernel.org/patch/10731915/

Sowjanya Komatineni (1):
  mmc: cqhci: DMA Configuration prior to CQE

 drivers/mmc/host/cqhci.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

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2.7.4