Re: [PATCH -next] platform/chrome: Fix Kconfig dependencies for wilco_ec

From: Enric Balletbo i Serra
Date: Thu Feb 21 2019 - 02:57:50 EST


Hi,

On 21/2/19 0:09, Randy Dunlap wrote:
> On 2/20/19 2:11 PM, Nick Crews wrote:
>> In the initial version of the Wilco EC Driver, the
>> dependency order was wrong. It before was possible to
>> select CONFIG_WILCO_EC and CONFIG_CROS_EC_LPC without
>> having CONFIG_CROS_EC_LPC_MEC. This was wrong, since
>> WILCO_EC depends upon CONFIG CROS_EC_LPC_MEC, not the
>> other way around.
>>
>> Fixes: 1733c32834e5d1 ("platform/chrome: Add new driver for Wilco EC")
>> Signed-off-by: Nick Crews <ncrews@xxxxxxxxxxxx>
>
> Reported-by: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>
> Acked-by: Randy Dunlap <rdunlap@xxxxxxxxxxxxx> # build-tested
>

As this is [-next] material I squashed that commit and queued for 5.1

Thanks,
Enric


> Thanks.
>
>> ---
>> drivers/platform/chrome/Kconfig | 2 +-
>> drivers/platform/chrome/wilco_ec/Kconfig | 3 +--
>> 2 files changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig
>> index 462eb9dfa4f2..b69561050868 100644
>> --- a/drivers/platform/chrome/Kconfig
>> +++ b/drivers/platform/chrome/Kconfig
>> @@ -95,7 +95,7 @@ config CROS_EC_LPC
>>
>> config CROS_EC_LPC_MEC
>> bool "ChromeOS Embedded Controller LPC Microchip EC (MEC) variant"
>> - depends on CROS_EC_LPC || WILCO_EC
>> + depends on CROS_EC_LPC
>> default n
>> help
>> If you say Y here, a variant LPC protocol for the Microchip EC
>> diff --git a/drivers/platform/chrome/wilco_ec/Kconfig b/drivers/platform/chrome/wilco_ec/Kconfig
>> index 20945a301ec6..c6bc4e8f3062 100644
>> --- a/drivers/platform/chrome/wilco_ec/Kconfig
>> +++ b/drivers/platform/chrome/wilco_ec/Kconfig
>> @@ -1,7 +1,6 @@
>> config WILCO_EC
>> tristate "ChromeOS Wilco Embedded Controller"
>> - depends on ACPI && X86
>> - select CROS_EC_LPC_MEC
>> + depends on ACPI && X86 && CROS_EC_LPC_MEC
>> help
>> If you say Y here, you get support for talking to the ChromeOS
>> Wilco EC over an eSPI bus. This uses a simple byte-level protocol
>>
>
>