Re: [PATCH V5 00/12] perf: Add Icelake support (kernel only, except Topdown)

From: Liang, Kan
Date: Mon Apr 08 2019 - 18:49:40 EST




On 4/8/2019 12:06 PM, Liang, Kan wrote:
@@ -1875,7 +1868,7 @@ static void intel_pmu_drain_pebs_nhm(str
ÂÂÂÂÂÂÂÂÂ counts[bit]++;
ÂÂÂÂÂ }
-ÂÂÂ for (bit = 0; bit < size; bit++) {
+ÂÂÂ for_each_set_bit(bit, (unsigned long *)&mask, size) {
ÂÂÂÂÂÂÂÂÂ if ((counts[bit] == 0) && (error[bit] == 0))
ÂÂÂÂÂÂÂÂÂÂÂÂÂ continue;
@@ -1939,7 +1932,7 @@ static void intel_pmu_drain_pebs_icl(str
ÂÂÂÂÂÂÂÂÂÂÂÂÂ counts[bit]++;
ÂÂÂÂÂ }
-ÂÂÂ for (bit = 0; bit < size; bit++) {
+ÂÂÂ for_each_set_bit(bit, (unsigned long *)mask, size) {
ÂÂÂÂÂÂÂÂÂ if (counts[bit] == 0)
ÂÂÂÂÂÂÂÂÂÂÂÂÂ continue;

I have finished the tests for the changes. There is one more regression found by another typo on ICL.

Should be "for_each_set_bit(bit, (unsigned long *)&mask, size) {"

Thanks,
Kan