Re: [PATCH v3 0/3] clk: add driver for the SiFive FU540 PRCI and PLLs it controls

From: Paul Walmsley
Date: Fri Apr 26 2019 - 13:01:29 EST


Hi Stephen,

On Thu, 25 Apr 2019, Stephen Boyd wrote:

> Quoting Paul Walmsley (2019-04-11 01:26:16)
> > clk: add driver for the SiFive FU540 PRCI and PLLs it controls
> >
> > Add a driver for the SiFive FU540 PRCI IP block, which handles clock and
> > some device reset control for the SiFive FU540 chip. Also add a driver-
> > independent library for the Analog Bits Wide-Range PLL (WRPLL), used by
> > the PRCI driver to monitor and control the WRPLL instances on the FU540
> > chip.
> >
> > Boot-tested on a SiFive HiFive Unleashed board, using BBL and the
> > open-source FSBL with a mainline-focused DTB.
> >
> > This third version incorporates changes requested by Stephen Boyd
> > <sboyd@xxxxxxxxxx> and Rob Herring <robh@xxxxxxxxxx>.
> >
> > This patch series is also available, along with the DT macro prerequisite
> > patch, at:
>
> Can you please send the dt macro patch along with the rest of the
> patches? I can't apply these patches and build them without it.

It's upstream now as commit 6ec4bae178d8 ("dt-bindings: clock: sifive: add
FU540-C000 PRCI clock constants")

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6ec4bae178d8a1e9814eb3bfdd321b0475de0468


- Paul