Re: [PATCH 1/2] RISC-V: Add DT documentation for SiFive L2 Cache Controller
From: Yash Shah
Date: Thu May 02 2019 - 05:36:16 EST
On Thu, May 2, 2019 at 2:40 PM Sudeep Holla <sudeep.holla@xxxxxxx> wrote:
> Sorry if I created confusion. I just wanted a note saying all the properties
> in ePAPR/DeviceTree specification applies for this platform. That would
> help me check if the standard cacheinfo infrastruction works as is or not.
Sure, will add this note.