Re: [PATCH v4 2/2] clk: sifive: add a driver for the SiFive FU540 PRCI IP block

From: Stephen Boyd
Date: Thu May 02 2019 - 18:12:07 EST


Quoting Paul Walmsley (2019-04-30 13:51:00)
> Add driver code for the SiFive FU540 PRCI IP block. This IP block
> handles reset and clock control for the SiFive FU540 device and
> implements SoC-level clock tree controls and dividers.
>
> Based on code written by Wesley Terpstra <wesley@xxxxxxxxxx>:
> https://github.com/riscv/riscv-linux/commit/999529edf517ed75b56659d456d221b2ee56bb60
>
> Boot and PLL rate change were tested on a SiFive HiFive Unleashed
> board.
>
> This version includes several changes requested by Stephen Boyd
> <sboyd@xxxxxxxxxx>.
>
> Signed-off-by: Paul Walmsley <paul.walmsley@xxxxxxxxxx>
> Signed-off-by: Paul Walmsley <paul@xxxxxxxxx>
> Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
> Cc: Stephen Boyd <sboyd@xxxxxxxxxx>
> Cc: Albert Ou <aou@xxxxxxxxxxxxxxxxx>
> Cc: Wesley W. Terpstra <wesley@xxxxxxxxxx>
> Cc: Palmer Dabbelt <palmer@xxxxxxxxxx>
> Cc: Megan Wachs <megan@xxxxxxxxxx>
> Cc: linux-riscv@xxxxxxxxxxxxxxxxxxx
> Cc: linux-kernel@xxxxxxxxxxxxxxx
> Cc: linux-clk@xxxxxxxxxxxxxxx
> ---

Applied to clk-next