On Thu, 09 May 2019 08:10:09 +0100,
Heyi Guo <guoheyi@xxxxxxxxxx> wrote:
Hi Marc,That's a good question. They should have similar attributes.
We can see in its_vpe_schedule() the shareability bits of
GICR_VPENDBASER are set as non-shareable, But we set physical
PENDBASER as inner-shareable. Is there any special reason for doing
this? If it is because the vpending table is GICR specific, why
don't we do the same for physical pending table?
We have not seen function issue with this setting, but a specialThe main issue with the inner-shareable attributes and the GIC is that
detector in our hardware warns us that there are non-shareable
requests sent out while some inner shareable cache entries still
present in the cache, and it may cause data inconsistent.
nothing in the spec says that CPUs and GIC have to be in the same
inner-shareable domain, as the system can have as many as you want.
You obviously have built it with GICR in the same inner-shareability
domain as the CPU. I'm happy to change the VPENDBASER attributes,
given that the CPU has a mapping to that memory already, and that
shouldn't affect systems where GICR isn't in the same inner shareable