Re: [PATCH] nvme-pci: Use non-operational power state instead of D3 on Suspend-to-Idle
From: Keith Busch
Date: Thu May 09 2019 - 12:27:24 EST
On Thu, May 09, 2019 at 03:28:32AM -0700, Kai-Heng Feng wrote:
> at 17:56, Christoph Hellwig <hch@xxxxxx> wrote:
> > The we have the sequence in your patch. This seems to be related to
> > some of the MS wording, but I'm not sure what for example tearing down
> > the queues buys us. Can you explain a bit more where those bits
> > make a difference?
> Based on my testing if queues (IRQ) are not disabled, NVMe controller wonât
> be quiesced.
> Symptoms can be high power drain or system freeze.
> I can check with vendors whether this also necessary under Windows.
Hm, that doesn't sound right based on the spec's description of how this
feature works. We should not need to tear down IO queues for entering
low power, nor reset the controller to exit it.
The sequence for entering non-operational low power should just be freeze
request queues, set the power feature, then unfreeze request queues.
We shouldn't have to do anything to exit the state as the spec requires
devices autonomously return to operational when an IO doorbell is written.