Re: [PATCH v2] clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register

From: Maxime Ripard
Date: Wed Jun 05 2019 - 07:53:53 EST

On Tue, Jun 04, 2019 at 05:40:36PM +0200, megous@xxxxxxxxxx wrote:
> From: Ondrej Jirman <megous@xxxxxxxxxx>
> The current code defines W1 clock gate to be at 0x1cc, overlaying it
> with the IR gate.
> Clock gate for r-apb1-w1 is at 0x1ec. This fixes issues with IR receiver
> causing interrupt floods on H6 (because interrupt flags can't be cleared,
> due to IR module's bus being disabled).
> Signed-off-by: Ondrej Jirman <megous@xxxxxxxxxx>
> Fixes: b7c7b05065aa77ae ("clk: sunxi-ng: add support for H6 PRCM CCU")

Applied, thanks


Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering

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