Re: [PATCH 1/2] KVM: LAPIC: Optimize timer latency consider world switch time
From: Wanpeng Li
Date: Wed Jun 12 2019 - 05:42:38 EST
On Fri, 31 May 2019 at 17:01, Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote:
> On 30/05/19 21:36, Sean Christopherson wrote:
> >> +u32 __read_mostly vmentry_lapic_timer_advance_ns = 0;
> >> +module_param(vmentry_lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
> > Hmm, an interesting idea would be to have some way to "lock" this param,
> > e.g. setting bit 0 locks the param. That would allow KVM to calculate the
> > cycles value to avoid the function call and the MUL+DIV. If I'm not
> > mistaken, vcpu->arch.virtual_tsc_khz is set only in kvm_set_tsc_khz().
> I would just make it read-only. But I'm afraid we're entering somewhat
> dangerous territory. There is a risk that the guest ends up entering
> the interrupt handler before the TSC deadline has actually expired, and
> there would be no way to know what would happen; even guest hangs are
Agreed, do it in v3.