Re: [PATCH v3 2/5] net: macb: add support for sgmii MAC-PHY interface

From: Russell King - ARM Linux admin
Date: Fri Jun 21 2019 - 05:03:25 EST


On Fri, Jun 21, 2019 at 09:34:50AM +0100, Parshuram Thombare wrote:
> This patch add support for SGMII interface) and
> 2.5Gbps MAC in Cadence ethernet controller driver.

Also, I'm not sure that merely using PHY_INTERFACE_MODE_SGMII with a
speed of 2.5Gbps is really on for up-clocked SGMII.

Cisco SGMII is defined as running at a fixed 1.25Gbps with the control
word indicating whether the negotiated speed is 1G, 100M or 10M, and
the MAC and PHY expect symbols to be replicated the appropriate number
of times for the slower speeds. Cisco SGMII as defined does not
support 2.5Gbps.

The same is true of 802.3z - this defines 1000BASE-X, but we also have
an up-clocked version which we use a separate phy interface mode for
when supporting 2.5Gbps, since it requires both ends to be configured
differently. This appears to be the case with your 2.5Gbps up-clocked
SGMII - the MAC needs to be told to up-clock the link.

So, I'm wondering whether we need PHY_INTERFACE_MODE_2500SGMII, which
means that if the PHY automatically selects between 1G and 2.5G SGMII,
then it needs to automatically change its interface mode reported back
to the MAC - that is, providing it really _does_ use an up-clocked
2.5Gbps SGMII and doesn't actually switch to 2.5Gbps BASE-X instead.

Other PHYs (the 10G Marvell 88x3310) dynamically switch their MAC
facing interface between 10GBASE-R, 2500BASE-X and SGMII depending on
the negotiated link speed, so there is precedent for this already.

Finally, note that it is possible for a mismatched SGMII / BASE-X
link to come up and appear to work, but either end is going to be
interpreting the 16-bit control word differently, which is obviously
incorrect.

Please ensure that details such as "SGMII" vs "BASE-X" are as correct
as possible.

--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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