On 20-06-19, 15:59, Sameer Pujar wrote:Not yet, we are in the process of upstreaming ADMAIF driver.
Where does ADMAIF driver reside in kernel, who configures it for normalYes the communication is between ADMA and AHUB. ADMAIF is the interfaceSo we have ADMA and AHUB and peripheral. You are talking to AHUB and thatSo can you explain me what is the difference here that the peripheralSay for example FIFO_THRESHOLD is programmed as 16 WORDS, BURST_SIZE as 8
cannot configure and use burst size with passing fifo depth?
ADMAIF does not push data to AHUB(operation ) till threshold of 16 WORDS
reached in ADMAIF FIFO. Hence 2 burst transfers are needed to reach the
As mentioned earlier, threshold here is to just indicate when data transfer
to AHUB modules.
is _not_ peripheral and if I have guess right the fifo depth is for AHUB
ADMA and AHUB. ADMA channel sending data to AHUB pairs with ADMAIF TX
Similary ADMA channel receiving data from AHUB pairs with ADMAIF RX channel.
FIFO DEPTH we are talking is about each ADMAIF TX/RX channel and it is
DMA transfers happen to/from ADMAIF FIFOs and whenever data(per WORD) is
out of ADMAIF to/from AHUB, asseration is made to ADMA. ADMA keeps counters
these assertions. By knowing FIFO DEPTH and these counters, ADMA knows when
to wait or
when to transfer data.
Thought it was clear, though should have avoided using 'peripheral' in the
Also it wold have helped the long discussion if that part was made clear
rather than talking about peripheral all this time :(