Re: [PATCH 2/8] ARM: OMAP2+: Remove unconfigured midlemode for am3 lcdc

From: Keerthy
Date: Wed Jul 24 2019 - 01:50:01 EST

On 24/07/19 12:33 AM, Suman Anna wrote:
+ Jyri

On 7/23/19 6:28 AM, Tony Lindgren wrote:
We currently get a warning for lcdc because of a difference
with dts provided configuration compared to the legacy platform
data. This is because lcdc has SYSC_HAS_MIDLEMODE configured in
the platform data without configuring the modes.

Hi Tony,
While I understand that you are trying to match the DT data with the
existing legacy data, do you know if there was a reason why this was
omitted in the first place? Should we be really adding the MSTANDBY_
flags and fix up the DTS node accordingly? I tried looking through the
git log, and the initial commit itself didn't add the MSTANDBY_ flags
but used the SYSC_HAS_MIDLEMODE.

Do you know the history?


This patch breaks DS0 on am3.

- Keerthy


Let's fix the warning by removing SYSC_HAS_MIDLEMODE. Note that
the am335x TRM lists SYSC_HAS_MIDLEMODE, but it is unused.

Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -231,7 +231,7 @@ static struct omap_hwmod am33xx_control_hwmod = {
static struct omap_hwmod_class_sysconfig lcdc_sysc = {
.rev_offs = 0x0,
.sysc_offs = 0x54,
+ .sysc_flags = SYSC_HAS_SIDLEMODE,
.sysc_fields = &omap_hwmod_sysc_type2,