[PATCH v3 04/16] dt-bindings: mrvl,intc: Add a MMP3 interrupt controller
From: Lubomir Rintel
Date: Fri Aug 30 2019 - 18:17:00 EST
Similar to MMP2 one, but has an extra range for the other core. The
muxes stay the same.
Signed-off-by: Lubomir Rintel <lkundrak@xxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Changes since v2:
- Add Rob's Reviewed-by tag
Changes since v1:
- Reformat the compatible property documentation to higlight the valid
- Drop an unneeded mmp3-intc example
.../bindings/interrupt-controller/mrvl,intc.txt | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt
index 608fee15a4cfc..a0ed02725a9d7 100644
@@ -1,13 +1,17 @@
* Marvell MMP Interrupt controller
-- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or
+- compatible : Should be
+ "mrvl,mmp-intc" on Marvel MMP,
+ "mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or
+ "marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3
- reg : Address and length of the register set of the interrupt controller.
If the interrupt controller is intc, address and length means the range
- of the whole interrupt controller. If the interrupt controller is mux-intc,
- address and length means one register. Since address of mux-intc is in the
- range of intc. mux-intc is secondary interrupt controller.
+ of the whole interrupt controller. The "marvell,mmp3-intc" controller
+ also has a secondary range for the second CPU core. If the interrupt
+ controller is mux-intc, address and length means one register. Since
+ address of mux-intc is in the range of intc. mux-intc is secondary
+ interrupt controller.
- reg-names : Name of the register set of the interrupt controller. It's
only required in mux-intc interrupt controller.
- interrupts : Should be the port interrupt shared by mux interrupts. It's