Re: [RESEND PATCH V3 3/8] perf/x86/intel: Support hardware TopDown metrics
From: Peter Zijlstra
Date: Sat Aug 31 2019 - 05:19:38 EST
On Wed, Aug 28, 2019 at 12:04:45PM -0700, Andi Kleen wrote:
> > > NMI
> > > ======
> > >
> > > The METRICS register may be overflow. The bit 48 of STATUS register
> > > will be set. If so, update all active slots and metrics events.
> > that happen? It would be useful to get that METRIC_OVF (can we please
> This happens when the internal counters that feed the metrics
> > If this is so; then we can use this to update/reset PERF_METRICS and
> > nothing else.
> It has to be handled in the PMI.
That's what I wrote; Overflow is always NMI.
> > Then there is no mucking about with that odd counter/metrics msr pair
> > reset nonsense. Becuase that really stinks.
> You have to write them to reset the internal counters.
But not for ever read, only on METRIC_OVF.