Re: [alsa-devel] [PATCH] ASoC: SOF: Intel: work around snd_hdac_aligned_read link failure

From: Takashi Iwai
Date: Tue Sep 10 2019 - 04:20:32 EST


On Tue, 10 Sep 2019 09:52:13 +0200,
Arnd Bergmann wrote:
>
> On Tue, Sep 10, 2019 at 9:06 AM Takashi Iwai <tiwai@xxxxxxx> wrote:
> > On Mon, 09 Sep 2019 22:51:23 +0200, Arnd Bergmann wrote:
> > >
> > > On Mon, Sep 9, 2019 at 10:39 PM Pierre-Louis Bossart
> > > <pierre-louis.bossart@xxxxxxxxxxxxxxx> wrote:
> > > >
> > > > On 9/9/19 2:51 PM, Arnd Bergmann wrote:
> > > > > When CONFIG_SND_HDA_ALIGNED_MMIO is selected by another driver
> > > > > (i.e. Tegra) that selects CONFIG_SND_HDA_CORE as a loadable
> > > > > module, but SND_SOC_SOF_HDA_COMMON is built-in, we get a
> > > > > link failure from some functions that access the hda register:
> > > > >
> > > > > sound/soc/sof/intel/hda.o: In function `hda_ipc_irq_dump':
> > > > > hda.c:(.text+0x784): undefined reference to `snd_hdac_aligned_read'
> > > > > sound/soc/sof/intel/hda-stream.o: In function `hda_dsp_stream_threaded_handler':
> > > > > hda-stream.c:(.text+0x12e4): undefined reference to `snd_hdac_aligned_read'
> > > > > hda-stream.c:(.text+0x12f8): undefined reference to `snd_hdac_aligned_write'
> > > > >
> > > > > Add an explicit 'select' statement as a workaround. This is
> > > > > not a great solution, but it's the easiest way I could come
> > > > > up with.
> > > >
> > > > Thanks for spotting this, I don't think anyone on the SOF team looked at
> > > > this. Maybe we can filter with depends on !TEGRA or
> > > > !SND_HDA_ALIGNED_MMIO at the SOF Intel top-level instead?
> > >
> > > That doesn't sound much better than my approach, but could also work.
> > > One idea that I had but did not manage to implement was to move out
> > > the snd_hdac_aligned_read/write functions from the core hda code
> > > into a separate file. I think that would be the cleanest solution,
> > > as it decouples the problem from any drivers.
> >
> > Yeah, that's a tricky problem because of the reverse-selection, as
> > usual...
> >
> > Another solution would be to just avoid byte/word access but use only
> > long access, i.e. replace snd_hdac_chip_readb() with
> > snd_hdac_chip_readl() with the aligned register and bit shift.
> > The aligned access helper is needed only for the register that isn't
> > aligned with 4 bytes offset.
>
> Ok, so basically open-coding the aligned access to RIRBSTS?
> That sounds like a much nicer workaround. So in place of
>
> sd_status = snd_hdac_stream_readb(s, SD_STS);
> dev_vdbg(bus->dev, "stream %d status 0x%x\n",
> s->index, sd_status);
> snd_hdac_stream_writeb(s, SD_STS, sd_status);
>
> I suppose one could just readl/writel SOF_HDA_ADSP_REG_CL_SD_CTL
> and print the shifted value, right?

Yes.

> While I know nothing about the underlying requirements, I wonder
> about two things that stick out to me:
>
> 1. the existing code just writes back the same byte it has read. If
> this write has no side-effects, why write it at all? OTOH, if it has
> side-effects, isn't the aligned implementation of writing the whole
> word in snd_hdac_aligned_write() fundamentally flawed?

The aligned read/write does already the whole 4-bytes read/write, so
it should work. But we need confirmation with the actual hardware.

> 2. Doesn't the read-modify-write cycle in snd_hdac_aligned_write()
> need locking to work correctly?

The helper doesn't guarantee the atomic write by itself, so a lock
would be required in the caller side if needed. Luckily there aren't
many places calling the unaligned access.


thanks,

Takashi