On 8/30/19 5:37 PM, Laurent Dufour wrote:
Since the commit ba2dd8a26baa ("powerpc/pseries/mm: call H_BLOCK_REMOVE"),
the call to H_BLOCK_REMOVE is always done if the feature is exhibited.
On some system, the hypervisor may not support all the combination of
segment base page size and page size. When this happens the hcall is
returning H_PARAM, which is triggering a BUG_ON check leading to a panic.
The PAPR document is specifying a TLB Block Invalidate Characteristics item
detailing which couple base page size, page size the hypervisor is
supporting through H_BLOCK_REMOVE. Furthermore, the characteristics are
also providing the size of the block the hcall could process.
Supporting various block size seems not needed as all systems I was able to
play with was support an 8 addresses block size, which is the maximum
through the hcall. Supporting various size may complexify the algorithm in
call_block_remove() so unless this is required, this is not done.
In the case of block size different from 8, a warning message is displayed
at boot time and that block size will be ignored checking for the
Due to the minimal amount of hardware showing a limited set of
H_BLOCK_REMOVE supported page size, I don't think there is a need to push
this series to the stable mailing list.
The first patch is initializing the penc values for each page size to an
invalid value to be able to detect those which have been initialized as 0
is a valid value.
The second patch is reading the characteristic through the hcall
ibm,get-system-parameter and record the supported block size for each page
The third patch is changing the check used to detect the H_BLOCK_REMOVE
availability to take care of the base page size and page size couple.
So ibm,segment-page-sizes indicates wether we support a combination of base page size and actual page size. You are suggesting that the value reported by that is not correct? Can you also share the early part of dmesg as below.
[ÂÂÂ 0.000000] hash-mmu: Page sizes from device-tree:
[ÂÂÂ 0.000000] hash-mmu: base_shift=12: shift=12, sllp=0x0000, avpnm=0x00000000, tlbiel=1, penc=0
[ÂÂÂ 0.000000] hash-mmu: base_shift=12: shift=16, sllp=0x0000, avpnm=0x00000000, tlbiel=1, penc=7
[ÂÂÂ 0.000000] hash-mmu: base_shift=12: shift=24, sllp=0x0000, avpnm=0x00000000, tlbiel=1, penc=56
[ÂÂÂ 0.000000] hash-mmu: base_shift=16: shift=16, sllp=0x0110, avpnm=0x00000000, tlbiel=1, penc=1
[ÂÂÂ 0.000000] hash-mmu: base_shift=16: shift=24, sllp=0x0110, avpnm=0x00000000, tlbiel=1, penc=8
[ÂÂÂ 0.000000] hash-mmu: base_shift=24: shift=24, sllp=0x0100, avpnm=0x00000001, tlbiel=0, penc=0
[ÂÂÂ 0.000000] hash-mmu: base_shift=34: shift=34, sllp=0x0120, avpnm=0x000007ff, tlbiel=0, penc=3
That shows different base page size and actual page size combination.
Laurent Dufour (3):
ÂÂ powerpc/mm: Initialize the HPTE encoding values
ÂÂ powperc/mm: read TLB Block Invalidate Characteristics
ÂÂ powerpc/mm: call H_BLOCK_REMOVE when supported
Â arch/powerpc/include/asm/book3s/64/mmu.h |ÂÂ 3 +
Â arch/powerpc/mm/book3s64/hash_utils.cÂÂÂ |ÂÂ 8 +-
Â arch/powerpc/platforms/pseries/lpar.cÂÂÂ | 118 ++++++++++++++++++++++-
Â 3 files changed, 125 insertions(+), 4 deletions(-)