Re: Relax CPU features sanity checking on heterogeneous architectures

From: Sai Prakash Ranjan
Date: Fri Oct 11 2019 - 09:40:16 EST

On 2019-10-11 19:04, Marc Zyngier wrote:
On Fri, 11 Oct 2019 18:47:39 +0530
Sai Prakash Ranjan <saiprakash.ranjan@xxxxxxxxxxxxxx> wrote:

Hi Mark,

Thanks a lot for the detailed explanations, I did have a look at all the variations before posting this.

On 2019-10-11 16:20, Mark Rutland wrote:
> Hi,
> On Fri, Oct 11, 2019 at 11:19:00AM +0530, Sai Prakash Ranjan wrote:
>> On latest QCOM SoCs like SM8150 and SC7180 with big.LITTLE arch, below
>> warnings are observed during bootup of big cpu cores.
> For reference, which CPUs are in those SoCs?

SM8150 is based on Cortex-A55(little cores) and Cortex-A76(big cores). I'm afraid I cannot give details about SC7180 yet.

>> SM8150:
>> >> [ 0.271177] CPU features: SANITY CHECK: Unexpected variation in
>> SYS_ID_AA64PFR0_EL1. Boot CPU: 0x00000011112222, CPU4: >> 0x00000011111112
> The differing fields are EL3, EL2, and EL1: the boot CPU supports
> AArch64 and AArch32 at those exception levels, while the secondary only
> supports AArch64.
> Do we handle this variation in KVM?

We do not support KVM.

Mainline does. You don't get to pick and choose what is supported or

Ok thats good.


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