[tip: perf/urgent] perf/x86/msr: Add new CPU model numbers for Ice Lake

From: tip-bot2 for Kan Liang
Date: Sat Oct 12 2019 - 09:19:40 EST


The following commit has been merged into the perf/urgent branch of tip:

Commit-ID: 1a5da78d00ce0152994946debd1417513dc35eb3
Gitweb: https://git.kernel.org/tip/1a5da78d00ce0152994946debd1417513dc35eb3
Author: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
AuthorDate: Tue, 08 Oct 2019 08:50:06 -07:00
Committer: Ingo Molnar <mingo@xxxxxxxxxx>
CommitterDate: Sat, 12 Oct 2019 15:13:09 +02:00

perf/x86/msr: Add new CPU model numbers for Ice Lake

PPERF and SMI_COUNT MSRs are also supported by Ice Lake desktop and
server.

Signed-off-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Cc: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Link: https://lkml.kernel.org/r/1570549810-25049-6-git-send-email-kan.liang@xxxxxxxxxxxxxxx
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
---
arch/x86/events/msr.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index c177bbe..8515512 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -92,6 +92,9 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_COMETLAKE_L:
case INTEL_FAM6_COMETLAKE:
case INTEL_FAM6_ICELAKE_L:
+ case INTEL_FAM6_ICELAKE:
+ case INTEL_FAM6_ICELAKE_X:
+ case INTEL_FAM6_ICELAKE_D:
if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
return true;
break;