Re: [PATCH] MIPS: add support for SGI Octane (IP30)
From: Thomas Bogendoerfer
Date: Mon Oct 14 2019 - 07:34:12 EST
On Fri, 11 Oct 2019 20:33:43 -0400
Joshua Kinard <kumba@xxxxxxxxxx> wrote:
> 144 /*
> 145 * Register DMA-reachable memory constraints.
> 146 * The xbridge(4) is limited to a 31-bit region (its IOMMU features
> 147 * are too restricted to be of use).
> 148 */
> 149 dma_constraint.ucr_low = 0;
> 150 dma_constraint.ucr_high = (1UL << 31) - 1;
> I never figured out how in Linux one does something equivalent. I knew it
> needed to be done in the older dma-coherence.h file, and now in the newer
> __phys_to_dma() function here. This is, if memory recalls correctly,
> because >2GB RAM in Octane causes issues w/ BRIDGE DMA access.
32bit DMA is always limited to 2GB address range by bridge. Right now we
our code doesn't support 32bit DMA access at all, because it was not really
usefull for IP27. With IP30 it's probably more usefull, but my current focus
is getting basic IP30 support merged and improve it from there. And as this
is a bridge limititation everything can still be placed in pci-xtalk-bridge.c
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