Re: [PATCH] ARM: dts: stm32: Enable high resolution timer

From: Marc Zyngier
Date: Mon Oct 14 2019 - 09:49:06 EST

On 2019-10-14 10:31, Benjamin GAIGNARD wrote:
On 9/27/19 2:59 PM, Marc Zyngier wrote:
On 2019-09-27 13:44, Benjamin GAIGNARD wrote:
On 9/27/19 2:41 PM, Marc Zyngier wrote:
On 2019-09-27 13:36, Benjamin GAIGNARD wrote:
On 9/27/19 1:22 PM, Marc Zyngier wrote:
On 2019-09-27 09:48, Benjamin Gaignard wrote:
Adding always-on makes arm arch_timer claim to be an high resolution
That is possible because power mode won't stop clocking the timer.

The "always-on" is not about the clock. It is about the comparator.
The clock itself is *guaranteed* to always tick. If it didn't,
that'd be
an integration bug, and a pretty bad one.

What you're claiming here is that your CPU never enters a low-power
Ever? I find this very hard to believe.

Furthermore, claiming that always-on is the way to force the
to be an hrtimer is factually wrong. This is what happens *if*
this is
the only timer in the system. The only case this is true is for
machines. Anything else has a global timer somewhere that will allow
the arch timers to be used as an hrtimer.

I'm pretty sure you too have a global timer somewhere in your system.
Enable it, and enjoy hrtimers without having to lie about the
of your system! ;-)

Hi Marc,

This SoC doesn't have any other global timer. Use arch_time is the
we have to provide hrtimer on this system.

And you don't have any form of power management either? What happens
your CPU goes into idle? If your system does any form of power
*and* doesn't have a separate timer, it is remarkably broken.

Even in low-power modes this timer is always powered and clocked so it
is working fine.

You're missing the point again. It is not about the clock, but the
that is internal to the CPU, and not functional when the CPU is in its
power mode. See also the verbiage in [1] (44.3 STGEN functional
which indicates that the clock source actually dies in low-power mode
against the architecture which mandates it to be always-on).

Also, coming back to your earlier assertion ("This SoC doesn't have
any other
global timer"): The documentation at [1] shows at least 17 timers that
be used and avoid this dirty hack.

So for what it is worth, NAK to this patch.

Hi Marc,

I have listen your remarks and propose another way to solve this issue:

I don't think you have. You're just trying to move the same dirty hack to
another place instead of properly describing your hardware, and Thomas
has pointed you in the same direction.

Jazz is not dead. It just smells funny...